| Summary: | 碩士 === 國立清華大學 === 電機工程學系 === 101 === Step-down DC converters are widely used in various applications such as server power、personal computer、VRMs of CPU boards and battery chargers. For higher step down ratio applications, the resulting output current of the above converters becomes rather large and often require a rather large output capacitor. Besides, when the step down ratio is too large, the corresponding switch duty cycle is required to operate at the threshold resulting in much high electric magnetic interruption. Furthermore, for higher power applications, the conduction losses of the converter will be severe if a single-phase converter is used. Hence, the goal of this thesis is aimed to developing a novel high step-down voltage ratio converter with low output ripple.
Basically, the contributions of this thesis may be summarized as follows. First, a novel high step-down voltage ratio converter topology is proposed. Compare with the existing converters, it has low component count which can result in low cost and high reliability. Also, the low output current ripple of the proposed converter can reduce the output capacitor volume and increase the converter power density. An improve voltage gain of D2/2 can be achieved where is the duty ratio of the converter, so that the diode conduction time can be reduced. In addition, the inductor currents in two phases can achieve uniform current sharing automatically. Second, derivation of both DC and AC models and mathematical analysis of the new converter are also made in the context for design of the closed-loop control. Third, a 400W prototype with a 400V input voltage and 24V output voltage is constructed to verify the feasibility of the new converter. Experimental results show that a maximum efficiency of 92.6% can be achieved when the load is 125W.
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