A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling

碩士 === 國立清華大學 === 電子工程研究所 === 101 === As the semiconductor technology development continues, device and interconnect line spacing are scaling down for achieving density and speed improvements. As the spacing is shrinking, it is accompanied by larger parasitic resistance and capacitance and hence lar...

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Main Author: 王仁澤
Other Authors: 張彌彰
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/76287119378227352956
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spelling ndltd-TW-101NTHU54280422015-10-13T22:30:11Z http://ndltd.ncl.edu.tw/handle/76287119378227352956 A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling 可應用於建構時依性介電崩潰模型之Cu/ELK金屬連線漏電流機制探討 王仁澤 碩士 國立清華大學 電子工程研究所 101 As the semiconductor technology development continues, device and interconnect line spacing are scaling down for achieving density and speed improvements. As the spacing is shrinking, it is accompanied by larger parasitic resistance and capacitance and hence larger interconnect delay. This interconnect delay has become one of the bottleneck for circuit design. In order to reduce interconnect delay, the use of Cu metallization and low-k dielectrics are required. Although Cu/low-k interconnect technology can effectively reduce RC delay, time dependent dielectric breakdown (TDDB) phenomenon of low-k material has become an important reliability issue. In this thesis, several low-k TDDB models are reviewed and it is observed that the conduction mechanism of leakage current plays an important role in low-k TDDB phenomenon. Therefore, several leakage current models for low-k material are investigated. These include Schottky emission current model, Poole-Frenkel emission current model and Fowler-Nordheim tunneling current model. These leakage current models have been implemented in an interconnect simulation program, kappa, and can be compared to real silicon measurements. Some Cu/ELK interconnect test structures have been fabricated by TSMC. I-V measurements are carried out to assess the leakage current, including at three different temperatures. By comparing the slopes of the I-V curves, obtained from measurement and simulations, it shows that the Schottky emission current model has the best match with the measurement results. The barrier height between copper and ELK is found to be 0.87eV. Using one set of model parameters, we can get excellent matches between simulation and measurement data. Using this set of model coefficients, we also find that the most sensitive parameters of the leakage current are the line-to-line spacing and the ELK dielectric constant. Smaller spacing increases leakage current; while smaller dielectric constant also increases leakage current. Since this is the direction of technology scaling, it can be predicted that interconnect leakage current is getting more severe with scaling, so is the TDDB issue. 張彌彰 2013 學位論文 ; thesis 68 en_US
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language en_US
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description 碩士 === 國立清華大學 === 電子工程研究所 === 101 === As the semiconductor technology development continues, device and interconnect line spacing are scaling down for achieving density and speed improvements. As the spacing is shrinking, it is accompanied by larger parasitic resistance and capacitance and hence larger interconnect delay. This interconnect delay has become one of the bottleneck for circuit design. In order to reduce interconnect delay, the use of Cu metallization and low-k dielectrics are required. Although Cu/low-k interconnect technology can effectively reduce RC delay, time dependent dielectric breakdown (TDDB) phenomenon of low-k material has become an important reliability issue. In this thesis, several low-k TDDB models are reviewed and it is observed that the conduction mechanism of leakage current plays an important role in low-k TDDB phenomenon. Therefore, several leakage current models for low-k material are investigated. These include Schottky emission current model, Poole-Frenkel emission current model and Fowler-Nordheim tunneling current model. These leakage current models have been implemented in an interconnect simulation program, kappa, and can be compared to real silicon measurements. Some Cu/ELK interconnect test structures have been fabricated by TSMC. I-V measurements are carried out to assess the leakage current, including at three different temperatures. By comparing the slopes of the I-V curves, obtained from measurement and simulations, it shows that the Schottky emission current model has the best match with the measurement results. The barrier height between copper and ELK is found to be 0.87eV. Using one set of model parameters, we can get excellent matches between simulation and measurement data. Using this set of model coefficients, we also find that the most sensitive parameters of the leakage current are the line-to-line spacing and the ELK dielectric constant. Smaller spacing increases leakage current; while smaller dielectric constant also increases leakage current. Since this is the direction of technology scaling, it can be predicted that interconnect leakage current is getting more severe with scaling, so is the TDDB issue.
author2 張彌彰
author_facet 張彌彰
王仁澤
author 王仁澤
spellingShingle 王仁澤
A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
author_sort 王仁澤
title A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
title_short A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
title_full A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
title_fullStr A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
title_full_unstemmed A Study of Cu/ELK Interconnect Leakage Current Mechanism Leading to TDDB Modeling
title_sort study of cu/elk interconnect leakage current mechanism leading to tddb modeling
publishDate 2013
url http://ndltd.ncl.edu.tw/handle/76287119378227352956
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