Investigation on Characteristics and Degradation Behaviors of Integrated High-Voltage MOSFET Transistors

• Main Authors: Chou, Hsueh-Liang, 周學良
• Other Authors: Gong, Jeng
• Format: Others
• Language: en_US
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/13937491360209463823

博士 === 國立清華大學 === 電子工程研究所 === 101 === Abstract With the evolution of Moore’s law in CMOS technologies, the demands of high-voltage MOSFET transistors (HVMOS) are also rapidly increasing for the diversifications and functionalities in modern electronic product. For the reason, a 0.18μm BCD platform is developed for major consumer applications. This platform consists of modular processes with comprehensive device options in 5V to 70V ratings. To improve the conduction loss, 15~40% reduction of device on-resistance are achieved compared to state-of-art industrial IC-based competitors. Due to specific application requirements, various architectures as well as design techniques are introduced to construct the HVMOS in this BCD platform. It is known that the Kirk’s effect usually dominates the electric field distribution and impact-ionization generation. The influence is significant to device characteristics and the reliability degradations but varying with operation voltage, drift region profile, doping concentration and device architecture. Consequently, exceptional device characteristics and hot-carrier-injection (HCI) degradation behaviors are quite prevalent and distinct from the traditional understandings. In the dissertation, the design considerations and the achievements of the BCD platform are demonstrated. A few cases with respect to the atypical device characteristics while developing the BCD technology are comprehensively investigated as well.