| Summary: | 碩士 === 國立清華大學 === 工業工程與工程管理學系碩士在職專班 === 101 === The semiconductor factory production processes are complex Dispatching rule has a significant effect on production efficiency and costs. Most dispatching rules, optimized only for a single performance index, and fail to take into account other important indicators. This study developed a dispatching rules to optimize the target hit rate, the Work-In-Process number, and manufacturing cycle time more efficiently.
The research used “Waiting Time Allocation” (WTA) method to optimize the dispatching toward delivery rate improvements as a primary dispatching rule. The difference between the budgeted WIP and actual WIP is used as a supplementary dispatching rule when the batch is on or ahead of its delivery schedule. The concept of WTA is to allocate the waiting time for a batch at the current processing stage based on the remaining acceptable waiting time allocated across all remaining processes. Among the available batches of the products, the one with the lower allocated waiting time will get a higher priority to be processes. The concept of WIP budget is to plan the WIP distribution among all process stages based on the current waiting time allocation scheme, the known delivery dates, the known processing times, and their known transport times. The differences between the budgeted WIP and the actual WIP are then used to determine which lot will get priority to process. To reduce the WIP in the system, A lot with relative over-budget WIP at current station will get higher priority to be processed than the lot with under-budget WIP. Simulation of the proposed dispatching method on a real fab indicated that the proposed WTAWB dispatching performs better than FIFO, CR, and EDD in all three performance measures (Delivery rate, WIP, and cycle time) and is better than the pure WTA in WIP and cycle time performance.
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