Low Power Bus Codec Scheme with Gray Code
碩士 === 國立彰化師範大學 === 資訊工程學系 === 101 === As technology advances, interconnect delay has become a significant element for circuit performance in deep sub-micrometers system on-chip designs. The data pattern dependent signal switching of crosstalk caused delays compels bus cycle time for the worst case...
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| Format: | Others |
| Language: | zh-TW |
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2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/88486942264081638468 |