A Low Power Dual-clock FIFO for Data Transfers Between Unrelated and Haltable Clock Domains
碩士 === 國立彰化師範大學 === 資訊工程學系 === 101 === A multi-clock system is more common use in the system-on-chip (SOC) design which divid the circuit into several blocks, there are independent function, different clock domain and phase with each other. The main problem of this design is how to transfer the data...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80644465550079786485 |