A 5 GHz Phase-Locked Loop with Suppression Reference Spurious Tone Technique
碩士 === 國立中央大學 === 電機工程學系 === 101 === With the rapid development of semiconductor process technology, the operation frequency of the chip is much more faster than before. PLL is widely used in many communication chip systems to solve the phase error and delay of clock signal. It ensures the date be t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/70767870919837432627 |