| Summary: | 碩士 === 國立交通大學 === 機械工程系所 === 101 === This thesis proposed a proper and complete high/low side gate drive circuit for GaN transistors. Unlike the conventional enhancement mode driver, this circuit designed for the depletion mode transistors, providing a negative gate-source voltage to turn off the power transistors.
In the high side drive circuit, we design: 1. bootstrap high side circuit. 2. Needless high breakdown voltage element two kind of configuration to drive GaN/AlGaN transistors. The first method, we used a bootstrap circuit to provide a stable gate-source voltage for the power devices, and then transferred the logic signals into the appropriate control signals by the level shifter. In order to maintain high efficiency and reduce the power consumption of this circuit, the study designed a latch circuit, which combined with the level shifter to decrease the operating time. For the bootstrap capacitor charging problem, which was due to the “normally-on” property of the depletion mode transistor, the study also designed a start-up circuit to control the timing of the initial activation of the devices. Therefore, the bootstrap capacitor would have enough lead time to charge. The second method, we used two of capacitors to endure the high voltage from others elements. Therefore, the relative transistors in this circuit would not sustain high voltage. In general, high breakdown voltage elements need a special process. The special process is necessary in this configuration, so we can reduce the cost IC produce.
Both gate driver circuits are designed and simulated using HSPICE, and then verified by experimental results. In the first gate driver design, the experimental results show that it can work at 48V/100kHz.. In the second gate driver design, the GaN transistors can work at condition 24V/1kHz. Finally, we complete the circuit layout and apply for D35 process from CIC.
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