A study of monolayer doping technology and its application

碩士 === 國立交通大學 === 電子物理系所 === 101 === Nowadays, scaling device down to nanometer-size encounter many fundamental and technological challenges, one of the major challenges is attaining controlled doping of materials. As three-dimension structure is about to replace planar device, it become more crit...

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Bibliographic Details
Main Authors: Wang, Yi-Hong, 王貽泓
Other Authors: Chao, Tien-Sheng
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/07223214591465032735
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Summary:碩士 === 國立交通大學 === 電子物理系所 === 101 === Nowadays, scaling device down to nanometer-size encounter many fundamental and technological challenges, one of the major challenges is attaining controlled doping of materials. As three-dimension structure is about to replace planar device, it become more critical because conventional implantation is suffer from non-uniform vertical doping profile around a high aspect ratio fin structure. New material such as germanium and Ⅲ-Ⅴelements will bring to next technology node because of higher mobility property. However, the damage from implantation and high temperature fabrication process would limit those material developments. In order to overcome those disadvantages, it is necessary to exploit a new doping method as soon as possible. In this study, we develop a new doping way by a chemical molecular reaction upon silicon surface, and then it will form an organic monolayer which is contained Boron/Phosphorus atoms. It is a self-assemble doping process with conformal, ultra-shallow, and damage-free properties; furthermore, the self-limit quality of molecular reaction can get better controllability of dopant distribution. Therefore, it is more suitable for next technology node. It is about thousands Ω/□ and about 4 orders in Ion/Ioff ratio of both n-type and p-type doping at particular thermal condition. Those performances can exchange by different thermal machines (RTA &; MWA) and twice times doping. Using this doping method as an extension in tri-gate MOSFET structure and a simple way to reduce fabrication process are also discussed. At tri-gate device performance, different annealing machines and the thermal process times will affect the dopant distribution and the gate dielectric, resulting in leakage and other disadvantages. Furthermore, shallow junction will have better electrical properties contrast to deeper one is also be discussed in detail. At last, it may reduce the NiSi film thickness by MWA method and can be used to reduce resistance at S/D region in future.