An Improved Hilbert-Huang Transform Processor Design for Bio-sound Signals Processing System-on-Chip

• Main Authors: Chou, Chia-Ching, 周佳慶
• Other Authors: Fang, Wai-Chi
• Format: Others
• Language: en_US
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/04416618850668213558

碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 101 === The global population of people over the age of 65 is predicted to more than double, from 375 million in 1990 to 761 million by 2025. Healthcare problems relating to the aging population will become a serious social issue. Furthermore, because of the shortage of medical personnel, hospitals will be unable to afford the necessary medical interventions. Therefore, innovative health-care systems with high integrativity have become an important topic of research in recent years. This thesis presents a bio-sound signal processing System-on-Chip (SoC) with an on-board improved Hilbert-Huang transform (HHT) processor. This processor has proven to be an adaptive and efficient method for nonlinear and nonstationary signal analysis. However, the HHT method involves a large number of complicated and iterative computations. It is necessary to use VLSI technology to implement this proposed system with high integrativity and real-time applications. The proposed improved HHT SoC design consists of a data pre-processing unit to suppress noise and the aliasing effect. An intelligent memory management unit was developed to solve the problem of frequently reading and writing data from and to the memory, and a system control unit is used to effectively accelerate the performance of the overall system. The heart sound signals could be decomposed into a collection of Intrinsic Mode Function (IMFs) through an EEMD engine. The Hilbert spectrum analysis of each corresponding IMF can be efficiently derived through an improved IFNDQ engine based on the direct quadrature method. To overcome the noise and aliasing effect caused by nonstationary signals, many innovative and effective modules were developed in this thesis. The proposed HHT SoC design could be implemented in hardware with limited resources and fabricated under TSMC 90 nm CMOS technology.