High-Speed and Area-Minimized FIR Filter Design using Memory-Based Multiplication on FPGAs
碩士 === 國立交通大學 === 電子研究所 === 101 === The complexity of finite impulse response (FIR) filters is dominated by multiple constant multiplication (MCM) block which realizes the multiplication of one data sample with multiple constant coefficients. Many works have been proposed for minimizing memory size...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2012
|
Online Access: | http://ndltd.ncl.edu.tw/handle/27064434356643951628 |