A 10-Gb/s 44.2dB Adaptive Equalizer with Automatic Duobinary Tracking Loop in 0.18μm CMOS Technology

A 10-Gb/s 44.2dB Adaptive Equalizer with Automatic Duobinary Tracking Loop in 0.18μm CMOS Technology

碩士 === 國立交通大學 === 電子工程學系電子研究所 === 101 === This thesis describes an adaptive equalizer using duobinary signaling scheme combined with the proposed real-time automatic duobinary tracking technique which is capable of regenerating a high-quality duobinary signal to simplify the data recovery process a...

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Bibliographic Details
Main Authors:	Li, An-Siou, 李安修
Other Authors:	Tsai, Chia-Ming
Format:	Others
Language:	zh-TW
Published:	2013
Online Access:	http://ndltd.ncl.edu.tw/handle/56xt4s

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