Applying FMEA to Shorten New Product Development Schedule --- A Case Study on Design House E

• Main Authors: Pan, Wen-Ching, 潘文景
• Other Authors: Chang, Yung-Chia
• Format: Others
• Language: zh-TW
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/kv4euc

碩士 === 國立交通大學 === 管理學院工業工程與管理學程 === 101 === This research uses the major product "Keyboard Controller (KBC)" of the IC design house E as the example. Since the most important period of design &; development items is from the definition of spec to field-programmable gate array design verification test, and the peiod occupies the highest percentages and has the most deviation in the whole new product development processes, the schedule of the whole new product development is affected by this period. Therefore, based on the characteristics of Failure Mode and Effect Analysis (FMEA), the study simulates the new product design steps through analysis processes and supportive tables to avoid any possible potential problem during design steps so that E company can prevent or decrease the faliure modes during new product design &; development period, and shorten the new product development timeframe in E company to reduce "time to market" timeline to make new products scramble semiconductor market and get the opportunities in the very first place.