| Summary: | 碩士 === 國立暨南國際大學 === 電機工程學系 === 101 === This thesis aim is to design and implement the low noise amplifier, operating frequency at 3~10 GHz (Ultra-Wideband)，57~64 GHz (V-band) and 77~81 GHz (W-band) The thesis can be divided into three parts：
In the first part, a low noise figure (NF) and high power gain (S21) 3~10 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent phase linearity using standard 0.18 μm CMOS technology is reported. A π - match input network is used to achieve wideband input impedance matching. Both high and flat S21 and low and flat NF frequency responses are achieved by tuning the pole frequencies and pole quality factors of the second-order gain and NF frequency responses to approximate the maximally flat condition simultaneously. The LNA consumes 18 mW, achieving S11 better than 10 dB for frequency lower than 12.2 GHz and group-delay-variation smaller than ±14.6 ps for frequencies 3~10 GHz. Additionally, high and flat S21 of 13.7±1.5 dB is achieved for frequencies 3~12.5 GHz, which means the corresponding 3-dB bandwidth is 9.5 GHz. Furthermore, the LNA achieves minimum NF of 2.2 dB at 4 GHz and NF of 2.4 ± 0.1 dB for frequencies 3~10 GHz. The measured input third-order inter-modulation point (IIP3) is -2.5 dBm at 6 GHz. The chip area is only 600.8×662.4 mm^2 excluding the test pads.
In the second part, a 57~64 GHz low noise amplifier is designed for Vband system. For the sake of reducing chip size and cost, we design a two stage cascade amplifier. In the first stage we use a common source circuit. In order to get sufficient gain, we use a cascode circuit in the second stage. Then we use “T-matching” technique at the input and output term to achieve flat high gain (S21), low noise figure and better “S-Parameter” performances. Finally, we put bypass capacitances at the”Vdd” and “Vgs”term to make our circuit more stable.
Finally, a 77~81 GHz low noise amplifier is implemented for the short-range radar system. In order to obtain the high gain and wide bandwidth, we used three common source and conjugate matching techniques between interstage. We design a high gain, wideband and low noise LNA in TSMC 90 nm CMOS technology. The experimental results showed that the 3 dB bandwidth of 12 GHz, flat gain of 13±0.5 dB and power consuming of 21 mW, group-delay-variation of ±6.5 ps, and figure of merit (FOM) is 0.8, this results show that this LNA is suitable for short-range radar systems.
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