A Dataflow-based Cryptographic Processing Unit for High-Throughput IPsec Processors

• Main Authors: Chen-ChiehWang, 王振傑
• Other Authors: Chung-Ho Chen
• Format: Others
• Language: en_US
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/58394613711913027159

博士 === 國立成功大學 === 電腦與通信工程研究所 === 101 === Internet Protocol Security (IPsec) is a protocol suite for securing IP communications. In IPsec cryptographic processing, the encryption, decryption, and authentication operations are critical factors affecting the overall performance. A specialized cryptographic processing unit to take the advantages of regularity and parallelism in the cryptographic algorithms is highly desirable for high speed network. In this dissertation, we propose a dataflow-based crypto processor architecture that inherently makes the best use of the obtainable parallelism. We propose a novel architecture called Multi-Pointer Sliding Window (MPSW) to improve the utilization of FIFO buffers as well as to reduce the number of data movements. The proposed design reduces 43% area cost and provides a better performance up to 37% compared to previous work. In order to design and verify the IPsec processor, we develop a full-system Network Virtual Platform (NetVP) to support ESL design methodology. Using the ESL system, we are able to explore the optimized performance and designs considering various architectural issues in the system level. In addition, the NetVP system provides an on-line verification capability to enable the designed target to communicate with a real network for system validation. The proposed full-system NetVP can also be applied to the development of other kinds of network accelerators, such as TOE, iSCSI, network router, and network switch.