A 12-bit 2GS/s Current-Steering DAC in 0.07mm2
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === In this thesis, a 12-bit 2GS/s current-steering DAC design is presented to overcome the three main nonlinearity sources, which are current source mismatch, output transition nonlinearity, and finite output impedance, and achieve high-speed high-resolution cha...
Main Authors: | Wei-ChengHung, 洪偉程 |
---|---|
Other Authors: | Tai-Haur Kuo |
Format: | Others |
Language: | en_US |
Published: |
2013
|
Online Access: | http://ndltd.ncl.edu.tw/handle/19395243757378184961 |
Similar Items
-
A 6-bit 1GS/s Current-Steering DAC
by: Hsing-Ming Lu, et al.
Published: (2012) -
A 14-Bit 2GS/s and 12-Bit 4GS/s Reconfigurable DAC with Triple Modes
by: Sheng-YangWeng, et al.
Published: (2014) -
An 8-Bit 10-GS/s DAC
by: Lo, Wei-Lun, et al.
Published: (2018) -
A 10-Bit 1-GS/s Current-Steering DAC with Foreground Calibration Method
by: Wei, Li-Fan, et al.
Published: (2017) -
A 10-Bit 1-GS/s Current-Steering DAC with Improved Dynamic-Performance Techniques
by: Ma, Yu-Qian, et al.
Published: (2018)