| Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === This thesis proposes a novel single-phase seven-level inverter. The topology of the proposed structure is composed of a DC source, a switched-capacitor circuit, and a coupled inductor. Compared to traditional seven-level inverter structure, the numbers of switches and diodes are reduced. The novel single-phase seven-level inverter reduces the number of capacitor by one, increasing the stability and life cycle of the circuit. The voltages of capacitors are self-balanced by switched-capacitor circuit and coupled inductor without complex control method. Therefore, the output voltage total harmonic distortion of the proposed structure can be reduced.
Finally, the simulation and experimental results show the 350-Vdc input voltage, 380-Vac output voltage, and 0.52 % output total harmonic distortion under 3 kW output power condition to verify the feasibility of the proposed multilevel inverter.
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