Algorithm and Architecture Design for 2D and 3D Video Signal Processing

博士 === 國立中興大學 === 電機工程學系所 === 101 === In recent years, 3D display technology has been receiving increasingly more attention. Due to the enormous number of existing 2D videos, 2D-to-3D video conversion plays an important role in 3D content production. In this thesis, we propose a hybrid depth-generat...

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Bibliographic Details
Main Authors: Yu-Fan Lai, 賴昱帆
Other Authors: Yeong-Kang Lai
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/07237566055440242297
Description
Summary:博士 === 國立中興大學 === 電機工程學系所 === 101 === In recent years, 3D display technology has been receiving increasingly more attention. Due to the enormous number of existing 2D videos, 2D-to-3D video conversion plays an important role in 3D content production. In this thesis, we propose a hybrid depth-generation algorithm for 2D-to-3D conversion in 3D displays. We choose three depth cues for depth estimation: motion information, linear perspective, and texture characteristics. Depth-Image-Based Rendering (DIBR) can combine the depth map information with original 2D images, and simultaneously output 3D rendering for the left and right eyes. Moreover, we propose a high quality view synthesis algorithm and architecture for 2D-to-3D conversion. The proposed view synthesis algorithm consists of two parts: 3D image warping and inpainting (hole filling). 3D image warping transforms a 2D camera image plane to a 3D coordinate plane. However the integer grid points of the reference are warped to irregularly spaced points in the virtual view, resulting in occlusion problems. Thus inpainting is needed to fix the virtual images. The proposed algorithm shows an improved PSNR gain of 0.2~1.5dB. We adopt hardware/software co-design to accomplish the proposed view synthesis algorithm. For this we implemented the image inpainting on a FPGA device and the remaining algorithm in software. In multimedia system, there are many standards such as MPEG-1/2/4, VC-1 and H.264, which all have the IDCT transform. In order to support multi-standard and lower cost, it is necessary to design a reconfigurable IDCT architecture for video decoder to decode various video standards. The proposed IDCT architecture can support various video standards such as VC-1, MPEG-1/2/4 and H.264 AVC. It can sustain four transform types, 8x8, 8x4, 4x8 and 4x4 transform. The advantages of the proposed architecture are that this architecture does not require multipliers and ROM. It only needs adders and shifters. Finally, we proposed scalable view window with quality enhancement for touchable displays. The algorithm is easy for implementation, and its computational complexity is acceptable on an embedded system. Its computational complexity is not only low, but it can also get good image quality. This algorithm is suitable for various digital displays applications like digital picture frame.