Master-Slave Match-Line Circuit Design for Low-Power Content Addressable Memory
碩士 === 國立中興大學 === 資訊科學與工程學系所 === 101 === Content addressable memory (CAM) is a fast lookup hardware table. However, its parallel comparison feature and frequent lookup cause significant power consumption. In this paper we propose a low power match-line architecture, called master slave (MS) match-li...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/5u43q4 |