Design of Scan Architecture Targeted for Test Input/Output Compaction

Design of Scan Architecture Targeted for Test Input/Output Compaction

碩士 === 國立中興大學 === 資訊科學與工程學系 === 101 ===

Bibliographic Details
Main Authors:	Che-Wei Kao, 高哲緯
Other Authors:	王行健
Format:	Others
Language:	zh-TW
Published:	2013
Online Access:	http://ndltd.ncl.edu.tw/handle/50654158691508571245

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