The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package
碩士 === 中華大學 === 機械工程學系碩士班 === 101 === ABSTRACT The trend of electronic products today is moving toward further miniaturization, high functionality and improved performance. To accomplish this, new packaging needs to be able to integrate more dies with greater function, higher I/O counts, smaller pit...
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ndltd-TW-101CHPI54890282019-05-15T21:13:56Z http://ndltd.ncl.edu.tw/handle/kt9623 The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package 高角柱 POP 堆疊基板級封裝熱機行為探討 Lin Huai-Tse 林懷擇 碩士 中華大學 機械工程學系碩士班 101 ABSTRACT The trend of electronic products today is moving toward further miniaturization, high functionality and improved performance. To accomplish this, new packaging needs to be able to integrate more dies with greater function, higher I/O counts, smaller pitches, and greater heat densities, while being pushed into smaller and smaller footprints. The package-on-package (PoP) is one of the 3D packaging solutions, which typically integrates a high-density digital logic processor at the bottom package with high capacity memory dies on the top package. Electronic Packaging reliability plays a great concern to semiconductor and electronic product manufacturers. Failure is a component of any electronic product to lose its function, leading to electronic products is not working. Although 3D packaging technologies are progressively investigated and applied to perform better performance of IC packages, thermal- mechanical loading and its effect on reliability needs to be studied for optimum the overall packages. One of the limitations of conventional PoP structure is the solder ball pitch below 0.4mm when connected the two up and down packages. An alternative process is developed by replacing the solder ball as high copper pillar (HCP). The purpose of this research is to perform the finite element analysis to simulate the thermal-mechanical behaviors of the new developed PoP structure in board level. Three different structures are considered: (1) Type A is the traditional configuration; (2)Type B contains the copper pillar with majority of copper and minority of solder material; and(c) Type C contains the copper pillar from top of the bottom package and bottom of the top package, which connected by small solder material. The loading of the packaging is simulated under accelerated temperature cycling conditions (-55 °C~125 °C). Due to the dimension scale of different components, the submodeling technique is used. The stress and strain distribution in each component of the package is investigated. The critical locations of the solders ball and HCP is established in the submodel. The Anald viscoplastic model is considered to the behavior of solder ball and solder joint. The reliability of new PoP package can be evaluated from the numerical results. The contribution of this study is an guidance for the manufacturer. Chen Ching I 陳精一 2013 學位論文 ; thesis 57 zh-TW |
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碩士 === 中華大學 === 機械工程學系碩士班 === 101 === ABSTRACT
The trend of electronic products today is moving toward further miniaturization, high functionality and improved performance. To accomplish this, new packaging needs to be able to integrate more dies with greater function, higher I/O counts, smaller pitches, and greater heat densities, while being pushed into smaller and smaller footprints. The package-on-package (PoP) is one of the 3D packaging solutions, which typically integrates a high-density digital logic processor at the bottom package with high capacity memory dies on the top package.
Electronic Packaging reliability plays a great concern to semiconductor and electronic product manufacturers. Failure is a component of any electronic product to lose its function, leading to electronic products is not working. Although 3D packaging technologies are progressively investigated and applied to perform better performance of IC packages, thermal- mechanical loading and its effect on reliability needs to be studied for optimum the overall packages.
One of the limitations of conventional PoP structure is the solder ball pitch below 0.4mm when connected the two up and down packages. An alternative process is developed by replacing the solder ball as high copper pillar (HCP). The purpose of this research is to perform the finite element analysis to simulate the thermal-mechanical behaviors of the new developed PoP structure in board level.
Three different structures are considered: (1) Type A is the traditional configuration; (2)Type B contains the copper pillar with majority of copper and minority of solder material; and(c) Type C contains the copper pillar from top of the bottom package and bottom of the top package, which connected by small solder material. The loading of the packaging is simulated under accelerated temperature cycling conditions (-55 °C~125 °C). Due to the dimension scale of different components, the submodeling technique is used. The stress and strain distribution in each component of the package is investigated. The critical locations of the solders ball and HCP is established in the submodel. The Anald viscoplastic model is considered to the behavior of solder ball and solder joint. The reliability of new PoP package can be evaluated from the numerical results. The contribution of this study is an guidance for the manufacturer.
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author2 |
Chen Ching I |
author_facet |
Chen Ching I Lin Huai-Tse 林懷擇 |
author |
Lin Huai-Tse 林懷擇 |
spellingShingle |
Lin Huai-Tse 林懷擇 The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
author_sort |
Lin Huai-Tse |
title |
The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
title_short |
The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
title_full |
The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
title_fullStr |
The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
title_full_unstemmed |
The Study of Thermal Behavior of Board Level with Copper Pillar to POP Package |
title_sort |
study of thermal behavior of board level with copper pillar to pop package |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/kt9623 |
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