Complexity effective HDR Generation and Tone Mapping with Quality Assessment

碩士 === 國立中正大學 === 電機工程研究所 === 101 === This paper describes a high-performance HDR imaging architecture and proposed a method to evaluate the effect of generating HDR. In our system produces a real-time High Dynamic Range (HDR) video synthesis from multiple shot acquisitions by using Xilinx zynq all...

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Main Authors: Cheng-ting PAN, 潘政廷
Other Authors: Ching-Wei Yeh
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/97702313241511135422
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spelling ndltd-TW-101CCU004420772015-10-13T22:23:49Z http://ndltd.ncl.edu.tw/handle/97702313241511135422 Complexity effective HDR Generation and Tone Mapping with Quality Assessment 考量品質評估之複雜效率化的高動態範圍生成與色調映射 Cheng-ting PAN 潘政廷 碩士 國立中正大學 電機工程研究所 101 This paper describes a high-performance HDR imaging architecture and proposed a method to evaluate the effect of generating HDR. In our system produces a real-time High Dynamic Range (HDR) video synthesis from multiple shot acquisitions by using Xilinx zynq all programmable SoCs. The proposed architecture enables a real-time HDR video flow for a full resolution at 60 frames per second. We improve a low computation tone mapping design and exploiting table lookup for HDR generating as real-time implementation. Also, we present a low-cost hardware system based on multiple shot with a FPGA development board. The proposed architecture enables a real-time HDR video flow for a full resolution at 60 frames per second. Ching-Wei Yeh 葉經緯 2013 學位論文 ; thesis 40 en_US
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language en_US
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description 碩士 === 國立中正大學 === 電機工程研究所 === 101 === This paper describes a high-performance HDR imaging architecture and proposed a method to evaluate the effect of generating HDR. In our system produces a real-time High Dynamic Range (HDR) video synthesis from multiple shot acquisitions by using Xilinx zynq all programmable SoCs. The proposed architecture enables a real-time HDR video flow for a full resolution at 60 frames per second. We improve a low computation tone mapping design and exploiting table lookup for HDR generating as real-time implementation. Also, we present a low-cost hardware system based on multiple shot with a FPGA development board. The proposed architecture enables a real-time HDR video flow for a full resolution at 60 frames per second.
author2 Ching-Wei Yeh
author_facet Ching-Wei Yeh
Cheng-ting PAN
潘政廷
author Cheng-ting PAN
潘政廷
spellingShingle Cheng-ting PAN
潘政廷
Complexity effective HDR Generation and Tone Mapping with Quality Assessment
author_sort Cheng-ting PAN
title Complexity effective HDR Generation and Tone Mapping with Quality Assessment
title_short Complexity effective HDR Generation and Tone Mapping with Quality Assessment
title_full Complexity effective HDR Generation and Tone Mapping with Quality Assessment
title_fullStr Complexity effective HDR Generation and Tone Mapping with Quality Assessment
title_full_unstemmed Complexity effective HDR Generation and Tone Mapping with Quality Assessment
title_sort complexity effective hdr generation and tone mapping with quality assessment
publishDate 2013
url http://ndltd.ncl.edu.tw/handle/97702313241511135422
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