A Low Power 12-bit SAR ADC with Split Capacitor Array for Biomedical Applications
碩士 === 淡江大學 === 電機工程學系碩士班 === 100 === Under the development of microcomputer system, Very Large Scale Integrated circuit (VLSI) and Digital Signal Processing (DSP), Analog to Digital Converter (ADC) relted applications has been widely used. Speed, resolution, power consumption, and area are the four...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/86945961070280859000 |
| Summary: | 碩士 === 淡江大學 === 電機工程學系碩士班 === 100 === Under the development of microcomputer system, Very Large Scale Integrated circuit (VLSI) and Digital Signal Processing (DSP), Analog to Digital Converter (ADC) relted applications has been widely used. Speed, resolution, power consumption, and area are the four key specifications while designing ADC. Under the limitations of the actual conditions, trade-off was made within these four specifications in order to design the most appropriate ADC converter. This thesis refers to the 12-Bit SAR-ADC which is mainly used in electrocardiogram (ECG) measurement system. In order to be able to capture the probability of arrhythmia through monitoring and recording ECG for a long period of time, the specifications must be low power consumption. The ADC converter chip proposed by this study was implemented by the TSMC 0.18μm 1P6M standard CMOS process technology. The sample rate is 2000Hz in 500Hz signal bandwidth. The maximum design power is 30μW under 1.8V power supply.
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