Design of Probeless IC Testing System

• Main Authors: Yu-Sheng Huang, 黃毓陞
• Other Authors: 邱弘緯
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/xbdq82

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 100 === This thesis is the basic principle of electromagnetic coupling, using a series resonant network to transfer energy, the energy transfer wirelessly to the receiver chip to achieve probeless testing. The system can be divided into two parts: the transmitter and receiver chip. In transmitter part, a Class-E power amplifier which enlarge the energy and matching network makes the energy transfer efficiency optimization. Data restore uses integrated circuit U2270B to transfer chip information; The chip is fabricated by TSMC 0.18μm 1P6M CMOS technology, including the rectifier, the low-dropout voltage regulator, the amplitude-shift keying demodulator, the load-shift keying modulator, the 8-bit successive-approximation-register analog-to-digital converters and the logic controller. The system can test both analog and digital signals by using a single frequency channel to complete the half-duplex data transmission. Transferred data is packaged as the first four parity check bits, the middle of eight main signal bits and the last four stop bits. The logic controller to distinguish the emission signal whether or not send a test command to achieve enable function. At the present stage, this thesis measures a half adder as prototype, by measurement results show that the feasibility of this method is high. In the future, it can be application in larger chip testing. Via this method, the cost of wafer probing will be decreasing.