Optimal Design of a High Conductivity Solder Ball and Underfill Technology for Wafer Level Chip Scale Package

• Main Authors: Meng-Tzung Liu, 劉孟宗
• Other Authors: Wei-Ching Chuang
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/wkeh5g

碩士 === 國立虎尾科技大學 === 光電與材料科技研究所 === 100 === The high efficiency, high power and high density have caused the development of the Wafer Level Chip Scale Package (WLCSP) to be the trend in the future. Although the input and output density of the WLCSP electronic signal can be improved, but also causes the reliability to reduce. Although there are many factors affecting the reliability of the package, among which those related to the underfill and the solder ball are considered to be the key factor. This paper focuses on Sn (96.5) / Ag (3.5) lead-free solder ball in WLCSP package. First, predict the shape and height of the solder ball then utilize Pro-E software to build up a three-dimensional model, and with the use of finite element analysis ANSYS 10.0 Workbench to investigate deformations of entire package under thermal cycling, and changes of stress-strain curve for solder ball and the package further comparing between the product reliability and Ansys software simulation. Using finite element analysis (Ansys) to research the high conductivity of the solder ball and its underfill and have the best design for the WLCSP package. And also consider the overall warpage, the maximum solder ball shear force, the stress buffer layer shear stress as the best feedback factors. The different WLCSP geometry, including chip thickness, pad diameter, solder ball height, the stress buffer layer Young’s modulus and the coefficient of thermal expansion (CTE) these are the experimental design (Design of Experiment, DOE) to consider the factors then to improve the stress and life of WLCSP package. The comparison between the compliant layer of the WLCSP and the traditional flip-chip package and then find out all the stress buffer layer thus creating two advantages in effectively release the stress and also cost down. In reference to finite element analysis to predict lower overall warpage and shear stress. It also helps to get the best overall warping; reducing the solder ball shear stress and the stress buffer layer suffered shear stress further optimizing to achieve results, and effective body to enhance the package reliability. The microelectronics packaging technology era have explosive growth that high I/O, high density and reliability signal connections for the IC packaging industry which became the main considerations. Therefore many different types of packaging techniques have been developed, such as BGA (Ball Grid Array) packaging technology, CSP (Chip Scale Package) packaging technology, FC (Flip Chip) packaging technology, WLCSP (Wafer Level Chip Scale Package) packaging technology and so on. I hope that through the study of this paper, it could be a help to the packaging industry for the application of lead-free solder ball material and underfill material, hopefully cutting cost, enhancing WLCSP reliability, and shortening development time, and enhance the competitive of the WLCSP products.