Hardware/Software Co-design and Implementation of a Multi-pixel-based Pipelined Algorithmic Processor for Single-pass-based Connected Component Labeling
碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === This thesis is relevant to the hardware/software co-design and verification of an algorithmic processor for single-pass-based connected component labeling. The research work consists of the following four parts. The first part of the thesis focuses on the softw...
Main Authors: | Bo-Hsiang Hsu, 許博翔 |
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Other Authors: | Chen-Mie Wu |
Format: | Others |
Language: | zh-TW |
Published: |
2012
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Online Access: | http://ndltd.ncl.edu.tw/handle/uhe6rj |
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