A Concurrent NoC Testing Methodology
碩士 === 國立臺灣大學 === 電機工程學研究所 === 100 === As the complexity of VLSI design scales, we are unlikely to adopt traditional SoC design method. Instead, network-on-chip (NoC) – a new SoC paradigm was formally proposed in 2002 which possesses more flexibility, scalability, reliability and the ability of...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/60725130685940331994 |