Summary: | 博士 === 國立臺灣大學 === 電信工程學研究所 === 100 === This doctoral dissertation investigates the linearity improvement technique and harmonic
mixers applied to microwave and millimeter wave receiver circuits.
The detailed description about the newly-proposed splitting cascode to improve the
circuit linearity at 60 GHz is presented in the first part of this dissertation. A 60-GHz demodulator
circuit in advanced 65-nm CMOS process is designed, fabricated, and tested.
The splitting cascode technique is used in this circuit to reduce the third order intermodulation
distortion (IMD3) level by more than 20 dB at 60 GHz. The improvement of IMD3
level achieves at best 29 dB in the operation band. This is the first circuit with direct
linearity improvement at 60 GHz.
In addition to the research on linearity improvement, a novel 180 hybrid is also
proposed for in gate/base-driven balanced harmonic mixers. A 60-GHz down-converted
balanced second-harmonic pumped mixer in 90-nm CMOS process and a D-band downconverted
balanced fourth-harmonic pumped mixer in 130-nm SiGe process are designed,
fabricated and measured to verify the circuit concept. The harmonic mixers achieve high
order harmonic mixing with conversion gain under small LO drive and dc power consumption.
The circuit performances rival those of previously published works.
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