The Design Method & At-speed Test Technique for Adders, and Wire & Wireless Front-end Transceivers
博士 === 國立臺灣大學 === 電子工程學研究所 === 100 === This dissertation presents one of the tops in microprocessor design and communication design between chips. Two parts are discussed: (1) the design methodology and at-speed test technique for high-performance adders, (2) wire and wireless frontend transceivers....
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/05504459703916884585 |