| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === Datapath is one of the most important components in high performance circuit designs, such as microprocessors, as it is used to manipulate all data. For better performance, a datapath is usually placed with high regularity and compactness. Although cell placement has been studied extensively, not much work addresses the optimization of datapaths, which are often treated as big macros. In this thesis, we propose a structure-aware placement algorithm that can exploit the regular structures of datapath circuits and meanwhile leverage effective techniques to achieve high quality and scalability. Our algorithm applies a nonlinear optimization for wirelength minimization and a sigmoid-based density model for density control during datapath placement. Compared with state-of-the-art works, our algorithm can achieve the best structure-aware placement results efficiently.
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