| Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 100 === Elliptic Curve Cryptography (ECC) has become popular for security system. In this work, we propose an operation scheduling and corresponding EC engine for scalar multiplication. Proposed Arithmetic Unit (AU) consists of 1 high-radix multiplier, 1 bit-parallel squarer, and 2 adders. In order to reduce area, we combine the multiplier, squarer and adder to eliminate AU input multiplexers. Parameter selection helps for reducing cycle and area. We use Montgomery Ladder Algorithm to avoid power analysis resistance. A bit-parallel squarer is implemented to reduce cycle. The experiments show the balanced implementations consume lower energy. Clock gating technology is applied for reducing power consumption.
Using TSMC 65nm CMOS technology, our EC engine could implement a scalar multiplication in 250ms at 95KHz over GF(2163). According to the synthesis result, EC engine features smaller area (17Kgates), low power consumption (5.5uW) and low energy consumption (1.4uJ). The energy comparison between our work and other published literatures shows that our approach is the best.
|
|---|
