Suppressing Test Inflation in Shared-Memory Parallel Automatic Test Pattern Generation
碩士 === 國立交通大學 === 電信工程研究所 === 100 === Multicore machines enable the possibility of parallel computing in Automatic Test Pattern Generation (ATPG). With sufficient computing power, previously proposed parallel ATPG has reached near linear speedup. However, test inflation in parallel ATPG yet arises a...
Main Author: | 顧鈞堯 |
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Other Authors: | 溫宏斌 |
Format: | Others |
Language: | en_US |
Published: |
2012
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Online Access: | http://ndltd.ncl.edu.tw/handle/60809277023248582339 |
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