| Summary: | 碩士 === 國立交通大學 === 電機學院電信學程 === 100 === There is one EMC design rule that the ground plane on the same plane as signal traces must be connected to the ground through vias and the distance between adjacent vias should not be longer than 1/20 the wavelength of the highest frequency of concern to prevent EMI problem caused by signal coupling. On the other hand, signal quality will be reduced while a lot of signal energy are taken away when the signal frequency is the same as the resonant frequency of PCB structure, and this lost energy will radiate into the air and cause more serious EMI problem.
The conductor-backed coplanar waveguide (CBCPW) structure was used to discuss this issue, CBCPW could excite TEM wave in the parallel-plate waveguide formed by the upper and lower ground planes and induce coupling noise and cross-talk. To analyze this problem, we do the simulation and use real PCB to measure EMI noise. We find that when the vias were added sequentially, more and more electric field and surface current density in the dielectric layer will be confined between signal trace and via and improve the S21curve and the resonant frequency will be higher, and the insertion loss will be lower.
By the way, we found the emission energy of resonant frequency was larger about 4-8dB than the frequency of non-resonant, the biggest up to 20dB. With via adding, it can improve 5-10dB emission noise at the same frequency. Finally, we found that if the via distance is less than 1/5-1/10 effective wavelength of the highest frequency, it can reduce 5-10dB emission noise, that can save the space for layout and block/area of inner layer.
|
|---|
