Minimized Disturbance Optimal Analysis and Grid Bin Size Refinement for HiBinLegalizer
碩士 === 國立交通大學 === 電信工程研究所 === 100 === With semiconductor fabrication technology developing, millions of standard cells and macros (pre-designed blocks or intellectual property (IP)) are integrated into a single chip. Legalization procedure is part of placement design in physical design automation. F...
Main Authors: | Cheng, Chiao-Ling, 鄭巧翎 |
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Other Authors: | Lee Yu-Min |
Format: | Others |
Language: | zh-TW |
Published: |
2011
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Online Access: | http://ndltd.ncl.edu.tw/handle/07911933695905051886 |
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