Thermal-Aware Placement and Routing for 3D FPGAs
碩士 === 國立交通大學 === 電子研究所 === 100 === The emerging 3D technology, which stacks multiple dies within a single chip and utilizes through-silicon vias (TSVs) as vertical connections, is considered a promising solution for achieving better performance and easy integration. Meanwhile, field programmable ga...
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| Format: | Others |
| Language: | en_US |
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2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/46662379260197919884 |