Over 100Mpixels Real Time JPEG-XR Encoder Design

碩士 === 國立交通大學 === 電機學院電子與光電學程 === 100 === In modern industry, although high resolution and wide dynamic range images had be used with in several applications like digital camera sensors, web display devices, so the compression of visual information becomes more and more important. JPEG XR [1] is an...

Full description

Bibliographic Details
Main Authors: Ding, Chien-Shan, 丁建杉
Other Authors: Chang, Tian-Sheuan
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/68727607689142825895
id ndltd-TW-100NCTU5124133
record_format oai_dc
spelling ndltd-TW-100NCTU51241332016-03-28T04:20:38Z http://ndltd.ncl.edu.tw/handle/68727607689142825895 Over 100Mpixels Real Time JPEG-XR Encoder Design 超越 100Mpixels 之即時JPEG XR影像編碼器設計 Ding, Chien-Shan 丁建杉 碩士 國立交通大學 電機學院電子與光電學程 100 In modern industry, although high resolution and wide dynamic range images had be used with in several applications like digital camera sensors, web display devices, so the compression of visual information becomes more and more important. JPEG XR [1] is an new image coding standard, based on high definition (HD) Photo developed by Microsoft [3]. It supports high compression performance higher than JPEG and JPEG2000. Entropy coding was the throughput bottleneck in previous architectures. There are three feedback loops in entropy coding stage; (1) Control of ModelBits, (2) Updating of the scanning order, and (3) Decision of the Huffman table to be used. Therefore, how to design a pipelined module in a straightforward implementation or processing Macroblocks in parallel structure becomes main design challenge. We generalized the characteristic of Normalization (Update ModelBits) and took advent -age of reduction of Levels. Our propose pipeline controller can optimal the encoding forward steps to decrease un-necessary data processing. We could safely pipeline all the encoding processes including the entropy coding and achieves higher throughput than those of related works. After our optimization, estimation of the encoding speed in our implementation is measured. The four images with same size but different manner are tested and represent quite similar results. The calculated throughput in terms of pixel/cycle shows that our implementation can achieve more than 1 pixel/cycle. The architecture is synthesized by Synposys Design Compiler with 0.18 um CMOS standard cell library. The result shows that the gate count of the designed JPEG XR encoder with 100MHz as target frequency is 235,377, number of used SRAMs is required by 992 × 3 channels. An over 100Mpixels real time JPEG XR encoder is designed. Chang, Tian-Sheuan 張添烜 2012 學位論文 ; thesis 50 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立交通大學 === 電機學院電子與光電學程 === 100 === In modern industry, although high resolution and wide dynamic range images had be used with in several applications like digital camera sensors, web display devices, so the compression of visual information becomes more and more important. JPEG XR [1] is an new image coding standard, based on high definition (HD) Photo developed by Microsoft [3]. It supports high compression performance higher than JPEG and JPEG2000. Entropy coding was the throughput bottleneck in previous architectures. There are three feedback loops in entropy coding stage; (1) Control of ModelBits, (2) Updating of the scanning order, and (3) Decision of the Huffman table to be used. Therefore, how to design a pipelined module in a straightforward implementation or processing Macroblocks in parallel structure becomes main design challenge. We generalized the characteristic of Normalization (Update ModelBits) and took advent -age of reduction of Levels. Our propose pipeline controller can optimal the encoding forward steps to decrease un-necessary data processing. We could safely pipeline all the encoding processes including the entropy coding and achieves higher throughput than those of related works. After our optimization, estimation of the encoding speed in our implementation is measured. The four images with same size but different manner are tested and represent quite similar results. The calculated throughput in terms of pixel/cycle shows that our implementation can achieve more than 1 pixel/cycle. The architecture is synthesized by Synposys Design Compiler with 0.18 um CMOS standard cell library. The result shows that the gate count of the designed JPEG XR encoder with 100MHz as target frequency is 235,377, number of used SRAMs is required by 992 × 3 channels. An over 100Mpixels real time JPEG XR encoder is designed.
author2 Chang, Tian-Sheuan
author_facet Chang, Tian-Sheuan
Ding, Chien-Shan
丁建杉
author Ding, Chien-Shan
丁建杉
spellingShingle Ding, Chien-Shan
丁建杉
Over 100Mpixels Real Time JPEG-XR Encoder Design
author_sort Ding, Chien-Shan
title Over 100Mpixels Real Time JPEG-XR Encoder Design
title_short Over 100Mpixels Real Time JPEG-XR Encoder Design
title_full Over 100Mpixels Real Time JPEG-XR Encoder Design
title_fullStr Over 100Mpixels Real Time JPEG-XR Encoder Design
title_full_unstemmed Over 100Mpixels Real Time JPEG-XR Encoder Design
title_sort over 100mpixels real time jpeg-xr encoder design
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/68727607689142825895
work_keys_str_mv AT dingchienshan over100mpixelsrealtimejpegxrencoderdesign
AT dīngjiànshān over100mpixelsrealtimejpegxrencoderdesign
AT dingchienshan chāoyuè100mpixelszhījíshíjpegxryǐngxiàngbiānmǎqìshèjì
AT dīngjiànshān chāoyuè100mpixelszhījíshíjpegxryǐngxiàngbiānmǎqìshèjì
_version_ 1718213334012002304