Design and Implementation of a Novel Multi-Level DC-AC Inverter
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === In this thesis, a novel multi-level DC-AC inverter is proposed. The proposed multi-level inverter generates seven levels AC output voltage with the appropriate gate signals design. Also, the low pass filter is used to reduce the total harmonic distortion of t...
Main Authors: | Cheng-HanHsieh, 謝政翰 |
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Other Authors: | Ming-Yang Cheng |
Format: | Others |
Language: | zh-TW |
Published: |
2012
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Online Access: | http://ndltd.ncl.edu.tw/handle/70137228460447495746 |
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