A Smart Reset Signal Generation Mechanism for SOC

• Main Authors: Shih-Hong Lin, 林世宏
• Other Authors: 黃德成
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/48750593460253683937

碩士 === 國立中興大學 === 資訊科學與工程學系所 === 100 === Keyword：VLSI、RESET、SOC Because of the rapid development of Very Large Scale Integrated Circuit (VLSI), many current diversified functions can be compacted into a single chip. The high degree of system integration results in more diverse embedded modules in the System On Chip (SOC). In general, the instability and reliability are becoming more critical if the complexity of circuit is increase. To cope with this issue, we propose an intelligent reset signal mechanism to redirect the system to a predefined program to escape from the instability status. This paper presents a design approach that integrates current reset signal processing circuit hardware in one SOC. Our system provides multiple reset routes in the integration design to resolve potential malfunctioning or instability by using hardware or software techniques. This method can enhance the reliability and stability of products. To verify this research, the integration system was applied to the design of the medical-products Infrared ear thermometers.