ASIP on Multi-Processor Architectures for Deblocking Filters

• Main Authors: Jun-xiong Wu, 吳俊雄
• Other Authors: none
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/12541925851465488436

碩士 === 逢甲大學 === 資訊工程所 === 100 === The deblocking filters are used to remove the discontinuous phenomenon in the H.264/AVC technology so that the image quality may be improved in a high compression rate. However, the deblocking filter occupies the one-third computation overhead of the H.264/AVC codec. This thesis proposes application-specific instruction-set multi-processor architectures to improve the deblocking filter performance with slight design and hardware overheads. Firstly, we partition the input data of the deblocking algorithm, and then assign each partition to individual processor to get parallel computing benefits. The application-specific instructions are selected for each partition of codes to increase performance.