The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology

碩士 === 長庚大學 === 電子工程學系 === 100 === The microwave/millimeter-wave (MMW) receiver integrated circuits are presented and designed by using TSMC 90 nm RF CMOS technology in this thesis. In first part, a V-band voltage controlled oscillator using a push-push circuit topology is designed to avoid increasi...

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Main Authors: Chia Yi Chu, 朱家益
Other Authors: H. C. Chiu
Format: Others
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/41070494469861902926
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spelling ndltd-TW-100CGU054280302015-10-13T21:28:02Z http://ndltd.ncl.edu.tw/handle/41070494469861902926 The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology 運用90nm RF CMOS 實現之 V-Band 降頻接收電路 Chia Yi Chu 朱家益 碩士 長庚大學 電子工程學系 100 The microwave/millimeter-wave (MMW) receiver integrated circuits are presented and designed by using TSMC 90 nm RF CMOS technology in this thesis. In first part, a V-band voltage controlled oscillator using a push-push circuit topology is designed to avoid increasing the high-frequency silicon substrate loss. An output frequency of 60 GHz can be presented by using a 30 GHz push-push oscillator. The frequency tuning range is about 2 GHz. The design of second part is the broadband mixer. The circuit topology of the mixer is double balance design including the on-chip Marchand baluns at RF and LO ports as single-to-differential signal transformation. The simulated RF bandwidth is ranging from 55 GHz to 90 GHz. To improve the isolation between the ports, the cascode type is also used in the circuit. The port-to-port isolations are better than 35 dB, respectively. A broadband low noise amplifier based on a cascode 3-stage amplifier design is presented in the final part. The common-source noise matching was used at first stage. The simulated operating frequency range is from 35 GHz to 65 GHz. The noise figures for 40 GHz and 60 GHz are 5 dB and 8 dB, respectively. H. C. Chiu 邱顯欽 2012 學位論文 ; thesis 82
collection NDLTD
format Others
sources NDLTD
description 碩士 === 長庚大學 === 電子工程學系 === 100 === The microwave/millimeter-wave (MMW) receiver integrated circuits are presented and designed by using TSMC 90 nm RF CMOS technology in this thesis. In first part, a V-band voltage controlled oscillator using a push-push circuit topology is designed to avoid increasing the high-frequency silicon substrate loss. An output frequency of 60 GHz can be presented by using a 30 GHz push-push oscillator. The frequency tuning range is about 2 GHz. The design of second part is the broadband mixer. The circuit topology of the mixer is double balance design including the on-chip Marchand baluns at RF and LO ports as single-to-differential signal transformation. The simulated RF bandwidth is ranging from 55 GHz to 90 GHz. To improve the isolation between the ports, the cascode type is also used in the circuit. The port-to-port isolations are better than 35 dB, respectively. A broadband low noise amplifier based on a cascode 3-stage amplifier design is presented in the final part. The common-source noise matching was used at first stage. The simulated operating frequency range is from 35 GHz to 65 GHz. The noise figures for 40 GHz and 60 GHz are 5 dB and 8 dB, respectively.
author2 H. C. Chiu
author_facet H. C. Chiu
Chia Yi Chu
朱家益
author Chia Yi Chu
朱家益
spellingShingle Chia Yi Chu
朱家益
The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
author_sort Chia Yi Chu
title The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
title_short The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
title_full The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
title_fullStr The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
title_full_unstemmed The Design of V-band Down Conversion Circuits Using 90nm RF CMOS Technology
title_sort design of v-band down conversion circuits using 90nm rf cmos technology
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/41070494469861902926
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