Current mode Synchronism Buck Converter with a New Non-overlap Circuit

碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 99 === The content of this paper is to design and implement a high-frequency switching DC-DC synchronous rectifier buck converter, which features that high-speed switching power converters can reduce the output filter inductor and capacitor size and that can pay...

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Bibliographic Details
Main Authors: Wang, Wei, 王偉
Other Authors: Chien-Hung Kuo
Format: Others
Language:zh-TW
Published: 2011
Online Access:http://ndltd.ncl.edu.tw/handle/35158249305523168248
Description
Summary:碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 99 === The content of this paper is to design and implement a high-frequency switching DC-DC synchronous rectifier buck converter, which features that high-speed switching power converters can reduce the output filter inductor and capacitor size and that can pay attention to the light of modern technology to meet portability trend short set. Very suitable for MP3, PDA and mobile phones and other portable electronic products. Although high-speed switching power converters can reduce the output filter inductor and capacitor size, the relative dead zone per unit time also increases the frequency of occurrence. From another perspective, if each cycle the length of time by the same die area, also on behalf of the dead time percentage share of the larger cycle time, which for the overall efficiency of a certain degree of impact, and continue with the switching frequency upgrade, this impact will grow. For this problem, the thesis proposes a place that can detect dead zone detection circuit when the death occurred can transmit a signal and end when the dead state. However, if the converter operates in discontinuous conduction mode, the method will not work. It presents a new dead zone control circuit, with new and traditional ways of working to make the conversion device in a continuous conduction mode and discontinuous conduction mode state can both operate normally. The new dead zone detection circuit and the new dead-time control circuit through the CIC, using Taiwan Semiconductor (TSMC) in CMOS 0.35um 2P4M 3.3V5V mixed-mode chip verification process to vote, this layout area of about 1.46mm x 1.46mm, operating voltage range of 2.4V to 3.6V fixed output of 1.8V, maximum output current of the design 600mA.