Electrical Modeling and Design for Signal Integrity of Area-Array Vertical Interconnects in Electronic Packaging
博士 === 國立臺灣大學 === 電信工程學研究所 === 99 === In order to optimize the electrical performance of electronic packaging, the electrical modeling and designs for signal integrity (SI) of vertical interconnects are the considerably critical issues. In this dissertation, the various significant kinds of nois...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60943366541212561875 |