Design of RF Receiver Front-end Circuits for Ku-band Communication Systems

• Main Authors: Mei-Jiun Liou, 劉美君
• Other Authors: Mei-Ling Yeh
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/89753704188249523161

碩士 === 國立臺灣海洋大學 === 電機工程學系 === 99 === This thesis designs the RF receiver front-end circuits for Ku-band communication system by using Agilent ADS software and TSMC 0.18-μm CMOS 1P6M process. The circuits are fabricated and measured through National Chip Implementation Center (CIC). The 12~15-GHz high-gain and low-voltage down-conversion mixer uses the single balanced architecture. The circuit improves and innovate the basic Gilbert Mixer to increase conversion gain and isolation which avoid loss and distortion of output IF signal. The measurement results show that when frequency is 12~15-GHz, the conversion gain is -2.5~-3.1 dB, noise figure is 19.5~22.6 dB, and RF input return loss S11 is lower than -38.6 dB. When frequency is at 13-GHz and LO input power is 6 dB, the input P1dB is -11 dBm and IIP3 is -3.5 dBm. The supply voltage is 1.2 V and power consumption including buffer is 20.88 mW. The chip area is 0.975*0.889 mm2. The Ku-band VCO with low phase noise is designed with the LC-tank and complementary crossed-coupled circuit. This circuit can decrease the current supply to achieve lower power consumption and higher gain to increase the output power. The measurement results show that the oscillation frequency is from 14.52~14.9 GHz and the phase noise is about -82.03 dBc/Hz at 1 MHz offset frequency. When Vtune is from -1 V ~ 2 V, the tuning range is 380 MHz.. The output power is -7.95~-11.55 dBm. The FOM is -96.46 dBc/Hz. The supply voltage is 1.8 V and power consumption including buffer is 38.861 mW. The chip area is 0.695*0.764 mm2. The 13~14-GHz LNA uses the cascode of a CG with a load NMOS and then cascades a CS to achieve high gain and wide-band performance. The post-simulation results show that when frequency is 13~14-GHz, the power gain is 12.62~13.2 dB, the noise figure is 3.65~3.86 dB, the input and output return loss (S11 and S22) are lower than -15 dB, the isolation is about 36 dB, input P1dB is -12 dBm, and IIP3 is -6.2 dBm. The supply voltage is 1.2 V, power consumption is 15.84 mW, and the layout area is 0.76*0.83 mm2. At last, the measurement results of the mixer and VCO and the simulation results of the LNA are combined to be a front end of a low IF receiver. The simulation results show that the supply voltage is 1.8 V and power consumption is 83.95 mW. The input return loss is -9~-19.7 dB and the output return loss is lower than -20 dB at IF port. The total gain is 10~12.3 dB, the total noise figure is 12.9~13.8 dB, input P1dB is -14.5 dBm, and IIP3 is -8 dBm.