VLSI Architecture for Computing the Dynamic Object Warping Algorithm

• Main Authors: Chih-Hao Ting, 丁致豪
• Other Authors: Mao-Hsu Yen
• Format: Others
• Language: zh-TW
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/45466959564920598411

碩士 === 國立臺灣海洋大學 === 資訊工程學系 === 99 === In this thesis, we proposed VLSI architecture to compute the DOW Algorithm. The DOW Algorithm is a dynamic program algorithm which has characters of compression and expansion, and can suitably apply to three-dimension object comparison. It can effective to solve the space warping problem in object recognition by its controllable warping distance, such as enlarging, shrinking, rotation, distortion, etc. The algorithm is contains a structure in six-dimensional complexity, to be aimed at the estimated problems which need massively to operate and slow, An ASIC(Application Specific Integrated Circuit) chip is very helpful to increase computation potency of the recognition system. We also propose SIMD architecture for computing the DOW algorithm. Such architecture is well-suited for VLSI implementation because of regular structure and small number of input/output. The SIMD architecture has been Simulation and Verification.