| Summary: | 碩士 === 國立臺灣師範大學 === 工業教育學系 === 99 === The greatest challenge for managers of the world is to measure productivity efficiency and raise the productivity of firms. Measuring a firm’s productivity efficiency is related to its goal to pursue excellence and long-term development. Managers’ understanding of the efficiency measurement of a specific firm can help to maximize the value of corporate governance for both managers and shareholders. Semiconductor industry is one of the most important industries in the world, and the total revenue has already hit US$253.5 billion in 2007 while the industry structure or the value chain is based upon the design, manufacturing, backend processes of major semiconductor products. In general, the value chain of the semiconductor industry is consisting of four parts, IC design, wafer fabrication, device packaging & test (P&T) as well as marketing and sales. In 2007, the total revenue of the fabless IC design industry was about US$51 billion, which accounted for 20% of the whole semiconductor industry and played a significant role. Understanding the efficiency of the fabless IC design houses are critical for managers of the fabless IC design houses, managers of semiconductor foundries as well as personal investors. However, few literatures benchmarked performance of global fabless IC design houses. Further, the limited researches evaluated performance of global IC design houses introduced the traditional Data Envelopment Analysis (DEA) of CCR or BCC models, the performance evaluation models evaluating the performance of Decision Making Units (DMUs) by selecting their favorable weights, which can be misleading since the performance evaluation results were derived based on different bases of comparisons of DMUs. The traditional DEA models are not fair models from the aspect of improper weight derivations. Thus, the purpose of this paper to evaluate the efficiency of global leading fabless IC design houses by introducing a new and reasonable analytic model by introducing a Multiple Objectives Programming (MOP) based DEA method. The leading fabless IC design houses will serve as DMUs while the inputs and outputs of the MOP based DEA method will be selected by literature review and then refined by the modified Delphi method based on opinions of industry experts. Finally, the efficiency achievement measure (EAM) being derived by the MOP based DEA method. In this research, the real values as efficiencies of the world’s leading fabless IC design houses’ will be evaluated. In addition, according to the analyses based the MOP/EAM models, strength and weakness of the IC design houses can be demonstrated and strategies for enhancing the houses can be proposed. The performance evaluation results of global leading fabless IC design houses can serve as a basis for industry analysis, investment strategy, etc. In the future, the proposed MOP based DEA model can serve as an appropriate method for performance evaluations.
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