Investigation and application of the performance of the SOI MOSFET
碩士 === 國立臺南大學 === 通訊工程研究所碩士班 === 99 === In this paper we propose the SOI(Silicon-on-Insulator) MOSFET structure to can improve the undesirable effects in the size reduction process of the Bulk MOSFET devices. In this structure, the parasitic capacitance resulted from the source and drain PN junction...
Main Authors: | Tzu-yun Chiu, 邱子芸 |
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Other Authors: | Chu-Yu Chen |
Format: | Others |
Language: | zh-TW |
Published: |
2011
|
Online Access: | http://ndltd.ncl.edu.tw/handle/28125107575244734719 |
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