A Novel Low Gate-Count Pipelined Serializer Topology with Multiplexer-Flip-Flops
碩士 === 國立清華大學 === 電機工程學系 === 99 === This paper proposes a pipelined serializer topology with MUX-FFs to be a high-throughput and low-cost solution for serial link interface transmitters. Analysis and simulation results show that the serializer in proposed topology reduces 52% the gate count without...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/33345964711978102596 |