Study of Ultra Shallow Junction Formation for 45 and 65 nm Devices Applications
博士 === 國立清華大學 === 電子工程研究所 === 99 === As CMOS technology continue to scale down, dopant profile engineering has become one of the major technology challenged in CMOS device fabrication. In the aggressively scaled CMOS device, shallow p-n junctions and low sheet resistances are essential for short cha...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/18770757375640220972 |