Design of High-performance CMOS MEMS Accelerometer SoC's

• Main Authors: Tan, Siew Seong, 陳曉翔
• Other Authors: Hsu, Klaus Y. –J.
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/61367606307474051754

博士 === 國立清華大學 === 電子工程研究所 === 99 === This thesis proposes a design concept to achieve high-sensitivity, low-noise, and thermally stable CMOS MEMS capacitive accelerometers. A novel process was demonstrated with a capacitive accelerometer, which contains a thermally stable MEMS sensor and an on-chip CMOS sensing circuit with chopper stabilization scheme, in 0.35 μm CMOS technology. Good performance was accomplished. It is superior to the results in other published works. The thermal stability of the accelerometer was achieved by forming a thick single-crystal silicon (SCS) layer at the bottom of the multi-layer MEMS structure. A novel post-CMOS process was proposed for this purpose. The resultant MEMS structures by using this method have high aspect ratios and show the property of being insensitive to residual stress and temperature variation. Moreover, the proposed process avoids the charge damage problem usually encountered during dry-etching. No leakage current due to charge damage was ever observed in the sample chips. The proposed process also led to minimal undercut of the SCS layer after the MEMS structure release. A sensing circuit with chopper stabilization scheme for CMOS MEMS capacitive accelerometers has been designed with emphasis on managing noise, sensor offset, and the DC bias at input terminals. The issue of DC bias was particularly addressed and an efficient, new method for obtaining reliable DC bias was proposed. For demonstration, a CMOS MEMS accelerometer with the sensor fabricated by the proposed process and with an integrated on-chip sensing circuit was realized and characterized. Experimental results showed that the proposed circuit led to good noise performance, the random offset in the sensors was efficiently compensated, and the input DC bias voltage was well maintained. The sensitivity of the accelerometer is 595 mV g-1, and the overall noise floor is 50 μg Hz-1/2 which corresponds to an effective capacitance noise floor of 0.024 aF Hz-1/2. The zero-g temperature coefficient of the accelerometer output voltage is only 1 mV oC-1 in the temperature range from 0 oC to 70 oC, which corresponds to an effective acceleration variation rate of 1.68 mg oC-1.