The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic

碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 99 === During the last years, several logic styles that counteract side-channel attacks, e.g. SPA, DPA, have been proposed. Such as Sense Amplifier Base Logic (SABL), Mask Dual-rail Pre-charge Logic (MDPL), Dual-Rail random Switching Logic (DRSL), Three-phase Dual-rai...

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Main Authors: Chih-Yu Shen, 沈志禹
Other Authors: Shyi-Tsong Wu Ph.D
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/78734029926269721342
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spelling ndltd-TW-099NIU074280012015-10-13T18:30:28Z http://ndltd.ncl.edu.tw/handle/78734029926269721342 The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic 抗差異電力分析攻擊之安全電路研究與設計:ThreePhaseDual-railMaskPre-chargeLogic Chih-Yu Shen 沈志禹 碩士 國立宜蘭大學 電子工程學系碩士班 99 During the last years, several logic styles that counteract side-channel attacks, e.g. SPA, DPA, have been proposed. Such as Sense Amplifier Base Logic (SABL), Mask Dual-rail Pre-charge Logic (MDPL), Dual-Rail random Switching Logic (DRSL), Three-phase Dual-rail Pre-charge Logic (TDPL), and ect. In this thesis, we depict the TDPL will leakage the information that the circuit operates, and we further modify the TDPL and propose the Three Phase Dual-rail Mask Pre-charge Logic (TDMPL). We use masking technology to randomize to the intermediate operating message, and it is one of the most powerful countermeasures against the DPA attack. The HSpice simulation results reveal the TDMPL guarantees balanced energy consumption, and independent of the processed data. Besides, we implement the TDMPL to AES S-Box. The simulation results exhibit the proposed circuit has good properties to resist DPA. Shyi-Tsong Wu Ph.D, 吳錫聰 博士 2010 學位論文 ; thesis 50 en_US
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language en_US
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description 碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 99 === During the last years, several logic styles that counteract side-channel attacks, e.g. SPA, DPA, have been proposed. Such as Sense Amplifier Base Logic (SABL), Mask Dual-rail Pre-charge Logic (MDPL), Dual-Rail random Switching Logic (DRSL), Three-phase Dual-rail Pre-charge Logic (TDPL), and ect. In this thesis, we depict the TDPL will leakage the information that the circuit operates, and we further modify the TDPL and propose the Three Phase Dual-rail Mask Pre-charge Logic (TDMPL). We use masking technology to randomize to the intermediate operating message, and it is one of the most powerful countermeasures against the DPA attack. The HSpice simulation results reveal the TDMPL guarantees balanced energy consumption, and independent of the processed data. Besides, we implement the TDMPL to AES S-Box. The simulation results exhibit the proposed circuit has good properties to resist DPA.
author2 Shyi-Tsong Wu Ph.D,
author_facet Shyi-Tsong Wu Ph.D,
Chih-Yu Shen
沈志禹
author Chih-Yu Shen
沈志禹
spellingShingle Chih-Yu Shen
沈志禹
The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
author_sort Chih-Yu Shen
title The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
title_short The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
title_full The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
title_fullStr The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
title_full_unstemmed The Study and Design for DPA-resistant Security Circuits:Three Phase Dual-rail Mask Pre-charge Logic
title_sort study and design for dpa-resistant security circuits:three phase dual-rail mask pre-charge logic
publishDate 2010
url http://ndltd.ncl.edu.tw/handle/78734029926269721342
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